中文
English2018年度盛會NCAP & Yole先進封裝及系統集成專題研討會開始報名啦！
2018/05/09
2018年6月20日-21日，華進和Yole將攜手舉辦為期兩天的先進封裝及系統集成專題研討會，內容覆蓋封裝5大方向，包括：板級封裝、Fanout、系統級封裝、先進基板、以及3D封裝技術等等。會議將重點關注目前炙手可熱的應用，如5G、AI、汽車及存儲。本次會議演講嘉賓來自全球知名企業及院校，包括：ASE Group、ERS、Gatech、HuaTian Technology、SPTS、Schweizer、CSU、USTC等等。
同往屆相比，本次新增半天性價比超高的短訓班，特邀中科大林福江教授和日月光集團工程副總郭一凡博士為大家分別講解射頻IC設計封裝表征與建模、高性能計算和先進封裝技術開發的相關知識。林福江教授長期從事微波／微電子交叉學科的研究工作，特別是先進半導體器件的射頻建模兼芯片集成方面，是公認的實用射頻建模專家；郭一凡博士曾在國外知名院校擔任教授，并先后在IBM、摩托羅拉、思佳訊和日月光任職，擁有豐富的研發、工程及運營經驗。如果你希望在最短的時間，掌握最精華的知識，請在注冊時選擇“研討會+短訓班”，早鳥打包價僅400歐元。
本次活動僅支持在線報名；注冊平臺現已開放，5月20日前注冊可享受早鳥價，歡迎大家報名！研討會議程將于下周發布，請關注華進微信公眾號（NCAP-CN）或官網（www.amcbg.com）獲取最新信息。
此外，本次活動的贊助商計劃正在熱銷中，如您希望借此平臺進行企業推廣，歡迎咨詢。
附：短訓班講師介紹及講座摘要
1. Accurate Package Characterization and Modeling for RFIC Design
●Abstract: Packages have great impacts on RFIC and high-speed IC performance for both bond-wire and package lead. They should be accurately characterized and modeled preferably in an equivalent circuit (EQC) model, so that they can be co-simulated for a reliable RFIC design. Although EM simulation is now widely used, it should be verified by practical measurement. This lecture will talk about experimental technique for accurate package modeling including full L and C matrix, as well as ground inductance based on VNA technique using RF probe station. Advanced EQC models are developed for RFIC design which have been proven for first-pass succss in packaged IC testing.
●About the speaker: Fujiang Lin received the BSEE and MSEE degrees from USTC, Hefei, China, and the Dr.-Ing. degree in MMIC from the University of Kassel, Germany. Dr. Lin has been the “Chinese K-Talent Program” full time professor at USTC since 2010. He established the USTC Micro/nano-Elecronic System Integration R&D Center (MESIC) focusing on advanced nanotech devices modeling and IC design. Prior returning back USTC, Dr. Lin worked as SMTS and PI in the Institute of Microelectronics, A*STAR, Singapore; as adjunct Associate Professor at NUS; as Director in CHRT (now GlobalFoundries), as Technical Director at HP/Agilent (now Keysight) EEsof; as founder and CEO of Transilica Singapore. Professor Lin has extensive hand-on and multi-discipline experiences and knowledge in advanced micro-/nano-electronics technologies, RF modeling for MMIC/RFIC and Packages, as well as the related integrated circuits and system design.
2. HPC and Advanced Packaging Technology Development
●Abstract: In recent development of semiconductor technologies, it is becoming more and more clear that the AI, typically presented by the cloud computations, autonomous vehicles and neural networks, will be the next major area of applications. One of the key characteristics of the AI applications is that it demands for high speed and extensive computation power. However, since the Moore’s Law is approaching its limit and the IC performance improvement by scaling will slow down eventually, using packaging technology to enhance the IC performance becomes urgent and important. In this presentation, the evolution of packaging technologies in high speed applications is introduces. Several advanced packaging platforms and their design and process challenges are presented. New and potential packaging solutions and development progress are discussed.
●About the speaker: Yifan Guo is a Vice President of Engineering in ASE Group. In past 30 years, he has taken positions as Professors and Adjunct Professors at Virginia Tech, State University of New York at Binghamton and University of California at Irvine. He has also worked for IBM, Motorola, Skyworks, ASE, and held positions from middle to high level management in charges of R/D, engineering and operation. He has published 7 book chapters, 9 patents and more than 50 refereed journal papers. Yifan Guo got his Ph.D degree from Engineering Science and Mechanics (ESM) Department at Virginia Tech. and MBA degree from School of Business at University of Redlands in California.
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